The exemplary embodiments of this invention relate generally to semiconductor devices and, more specifically, to semiconductor devices having channel materials incorporating III-V compounds and methods of forming the same.
Compound III-V semiconductor materials may be used as channel materials for semiconductor devices due to their high electron hole mobility. For example, a III-V semiconductor system using InGaAs/InAlAs material may be used due to its large conduction-band offsets and high carrier mobility. Schottky-gated InGaAs high electron mobility transistors (III-V HEMTs) grown on InP substrates have produced maximum transconductance (gm) values and have been shown to compare favorably in terms of a power-delay product.
Conventional III-V HEMTs are self-aligned structures in which the physical length of the gate structure equals the effective length of the channel. However, in III-V HEMTs, gate leakage due to a lack of gate dielectric may limit performance reliability. Thus, a thin gate dielectric layer is often inserted between the gate metal and the wide bandgap barrier layer forming a III-V metal-oxide semiconductor HEMT (III-V MOS-HEMT) or a III-V metal-oxide semiconductor field-effect transistor (III-V MOSFET). The use of a gate dielectric layer has the beneficial effect of reducing gate leakage. In particular, III-V MOS-HEMTs and III-V MOSFETs devices exhibit a leakage reduction of six to ten orders of magnitude compared to a Schottky barrier HEMT of similar design. However, the use of a gate dielectric may undesirably reduce the transconductance because of a larger gate-to-channel separation. Furthermore, decrease of gate-to-source capacitance may cause a shift of threshold voltage (Vt) for devices with a doped channel.
Conventional self-aligned III-V MOS-HEMTs and III-V MOSFETs are generally underlapped (i.e., the effective length of the channel is larger than the physical length of the gate structure) due to the fact that ion implantation techniques used in conventional silicon-based MOSFETs to create overlapped devices are not suitable for III-V materials. In III-V devices, damage created from ion implantation and subsequent rapid thermal anneal (RTA) can lead to strain relaxation, which degrades the transport properties of III-V materials. Conventional methods to manage the problem of strain relaxation have involved keeping the RTA temperature low, but this leads to an insufficient diffusion and insufficient activation of implanted ions.